Clock divider (2HP)
Clock Divider by Yves Usson.
A simple clock divider based on (several) CD4017 counter ICs. The outputs will go high every 2nd, 3rd... pulse received at the clock input. All counters are reset to zero when a trigger is fed into the Reset input, which can be used to create interesting polyrhythmic combinations.
The first version of this PCB is missing a pull-down on the buffered clock line (R35 in the latest version).
Without this pull-down resistor the divider will lock up when clocked at higher rates.